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» Arithmetic Coding for Low Power Embedded System Design
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DAC
1999
ACM
14 years 8 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
ASPDAC
2007
ACM
120views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost
The development cost of low-power embedded systems can be significantly reduced by reusing legacy designs and applying proper modifications to meet the new power constraints. The ...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
ISLPED
1995
ACM
113views Hardware» more  ISLPED 1995»
13 years 11 months ago
Low delay-power product CMOS design using one-hot residue coding
: CMOS implementations of arithmetic units for One-Hot Residue encoded operands are presented. They are shown to reduce the delay-power product of conventional, fully-encoded desig...
William A. Chren Jr.
DCC
2003
IEEE
14 years 7 months ago
Code Compression Using Variable-to-fixed Coding Based on Arithmetic Coding
Embedded computing systems are space and cost sensitive; memory is one of the most restricted resources, posing serious constraints on program size. Code compression, which is a s...
Yuan Xie, Wayne Wolf, Haris Lekatsas
LCTRTS
2007
Springer
14 years 1 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...