260 search results - page 7 / 52 » Array SSA Form and Its Use in Parallelization |
IJCAI
1989
13 years 8 months ago
1989
Parallel processors offer a very attractive mechanism for the implementation of large neural networks. Problems in the usage of parallel processing in neural computing involve the...
ICRA
1994
IEEE
13 years 11 months ago
1994
IEEE
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic ...
TWC
2008
13 years 7 months ago
2008
Abstract--We analyze asymptotic ergodic capacity of multidimensional vector-sensor array MIMO (PMD-MIMO) channels established by the use of dual-polarized antennas in the form of 1...
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
IRREGULAR
1995
Springer
13 years 11 months ago
1995
Springer
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...