51 search results - page 6 / 11 » Asynchronous DRAM Design and Synthesis |
DATE
2002
IEEE
13 years 12 months ago
2002
IEEE
This paper introduces several new component clustering techniques for the optimization of asynchronous systems. In particular, novel “Burst-Mode aware” restrictions are impose...
SBCCI
2006
ACM
14 years 26 days ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
FAC
2008
13 years 6 months ago
2008
Given deterministic interfaces P and Q, we investigate the problem of synthesising an interface R such that P composed with R refines Q. We show that a solution exists iff P and Q ...
ISMVL
2010
IEEE
14 years 5 hour ago
2010
IEEE
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
DAC
1999
ACM
14 years 7 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...