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» Asynchronous Polycyclic Architecture
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DAC
1995
ACM
13 years 11 months ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks
ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
13 years 11 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
ASYNC
2006
IEEE
122views Hardware» more  ASYNC 2006»
14 years 1 months ago
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter
Distributed sensor networks, human body implants, and hand-held electronics have tight energy budgets that necessitate low power circuits. Most of these devices include an analog-...
Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel
INFOCOM
2002
IEEE
14 years 9 days ago
Ultrafast Photonic Label Switch for Asynchronous Packets of Variable Length
- This paper describes new optical switching architectures supporting asynchronous variable-length packets. Output line contention is resolved by optical delay line buffers. By int...
Masayuki Murata, Ken-ichi Kitayama
DAC
1996
ACM
13 years 11 months ago
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis
This paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that "behave uniforml...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...