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ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
14 years 2 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
14 years 1 months ago
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Santiago González Pestana, Edwin Rijpkema, ...
ACSD
2006
IEEE
102views Hardware» more  ACSD 2006»
13 years 11 months ago
Models of Computation for Networks on Chip
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
Axel Jantsch
MSS
2000
IEEE
113views Hardware» more  MSS 2000»
14 years 2 months ago
Jiro Storage Management
The Jiro™ technology provides an environment intended for the implementation of storage management solutions. A product based on Jiro technology is an implementation based on th...
Bruce K. Haddon, William H. Connor
DAC
1999
ACM
14 years 2 months ago
ipChinook: an Integrated IP-based Design Framework for Distributed Embedded Systems
IPCHINOOK is a design tool for distributed embedded systems. It gains leverage from the use of a carefully chosen set of design ions that raise the level of designer interaction d...
Pai H. Chou, Ross B. Ortega, Ken Hines, Kurt Partr...