510 search results - page 64 / 102 » Automated Design of Quantum Circuits |
DAC
2005
ACM
14 years 11 months ago
2005
ACM
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
DAC
2000
ACM
14 years 11 months ago
2000
ACM
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
DAC
2000
ACM
14 years 11 months ago
2000
ACM
Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a circuit specified using a synchronous data-flow graph (DFG). In ...
DAC
2006
ACM
14 years 11 months ago
2006
ACM
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
DAC
2003
ACM
14 years 11 months ago
2003
ACM
Binary Decision Diagrams (BDDs) often fail to exploit sharing between Boolean functions that differ only in their support variables. In a memory circuit, for example, the function...