510 search results - page 82 / 102 » Automated Design of Quantum Circuits |
DAC
2006
ACM
14 years 10 months ago
2006
ACM
In a placed circuit, there are a lot of movable cells that can be flipped to further reduce the total wirelength, without affecting the original placement solution. We aim at solv...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
DAC
2006
ACM
14 years 10 months ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
IJHPCA
2008
13 years 10 months ago
2008
We present a de novo hierarchical simulation framework for first-principles based predictive simulations of materials and their validation on high-end parallel supercomputers and ...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing,...