Sciweavers

4359 search results - page 169 / 872
» Automated Pipeline Design
Sort
View
CLUSTER
2000
IEEE
15 years 8 months ago
Design and Performance of Maestro Cluster Network
Most clusters so far have used WAN or LAN-based network products for communication due to their market availability. However, they do not always match communication patterns in cl...
Shinichi Yamagiwa, Munehiro Fukuda, Koichi Wada
80
Voted
DAC
2008
ACM
16 years 4 months ago
Design and CAD for 3D integrated circuits
Ben Shani, Eun Chu Oh, Kurt Obermiller, Michael St...
66
Voted
DAC
1999
ACM
16 years 4 months ago
Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software
Hoon Choi, Ju Hwan Yi, Jong-Yeol Lee, In-Cheol Par...
85
Voted
DAC
2003
ACM
16 years 4 months ago
Schedulers as model-based design elements in programmable heterogeneous multiprocessors
JoAnn M. Paul, Alex Bobrek, Jeffrey E. Nelson, Jos...
ISVLSI
2007
IEEE
232views VLSI» more  ISVLSI 2007»
15 years 9 months ago
DSPstone Benchmark of CoDeL's Automated Clock Gating Platform
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
Nainesh Agarwal, Nikitas J. Dimopoulos