Sciweavers

4359 search results - page 221 / 872
» Automated Pipeline Design
Sort
View
ICDE
2009
IEEE
150views Database» more  ICDE 2009»
16 years 6 months ago
Oracle Streams: A High Performance Implementation for Near Real Time Asynchronous Replication
We present the architectural design and recent performance optimizations of a state of the art commercial database replication technology provided in Oracle Streams. The underlying...
Lik Wong, Nimar S. Arora, Lei Gao, Thuvan Hoang, J...
157
Voted
DSN
2009
IEEE
15 years 11 months ago
Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor
Dynamic Information Flow Tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal perfor...
Hari Kannan, Michael Dalton, Christos Kozyrakis
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
15 years 10 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
15 years 10 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
15 years 9 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha