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ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 1 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
14 years 1 months ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...
GROUP
2007
ACM
13 years 12 months ago
The implications of enterprise-wide pipeline management tools for organizational relations and exchanges
This paper explores the impact of enterprise-wide processes and technologies on group relations and exchanges. We examine the use of Customer Relationship Management (CRM) tools i...
Melissa Cefkin, Jakita O. Thomas, Jeanette Blomber...
EUROPAR
2008
Springer
13 years 9 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
ISCA
2012
IEEE
320views Hardware» more  ISCA 2012»
11 years 10 months ago
Viper: Virtual pipelines for enhanced reliability
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...