Sciweavers

425 search results - page 72 / 85
» Automated Synthesis of Multitolerance
Sort
View
FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 3 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
CASES
2003
ACM
14 years 2 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
KCAP
2003
ACM
14 years 2 months ago
Learning programs from traces using version space algebra
While existing learning techniques can be viewed as inducing programs from examples, most research has focused on rather narrow classes of programs, e.g., decision trees or logic ...
Tessa A. Lau, Pedro Domingos, Daniel S. Weld
COMPSAC
2002
IEEE
14 years 2 months ago
Formalizing Incremental Design in Real-time Area: SCTL/MUS-T
Achievement of quality in software design, while never easy, is made more difficult by the inherent complexity of hard real-time (HRT) design. Furthermore, timing requirements in...
Ana Fernández Vilas, José J. Pazos A...
ICDCS
2002
IEEE
14 years 2 months ago
The Complexity of Adding Failsafe Fault-Tolerance
In this paper, we focus our attention on the problem of automating the addition of failsafe fault-tolerance where fault-tolerance is added to an existing (fault-intolerant) progra...
Sandeep S. Kulkarni, Ali Ebnenasir