In today's SoC design cycles, debugging is one of the most time consuming manual tasks. CAD solutions strive to reduce the inefficiency of debugging by identifying error sourc...
Sean Safarpour, Hratch Mangassarian, Andreas G. Ve...
This paper develops automated testing and debugging techniques for answer set solver development. We describe a flexible grammar-based black-box ASP fuzz testing tool which is abl...
In this paper we define a sequent calculus to formally specify, simulate, debug and verify security protocols. In our sequents we distinguish between the current knowledge of prin...
In this paper, we present our position and experience on integrating formal methods with the Model-driven Engineering (MDE) approach to software development. Both these two approa...
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
Yibin Chen, Sean Safarpour, Andreas G. Veneris, Jo...