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ICCD
2001
IEEE
213views Hardware» more  ICCD 2001»
14 years 5 months ago
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Payam Heydari, Massoud Pedram
KDD
2012
ACM
207views Data Mining» more  KDD 2012»
11 years 11 months ago
Robust multi-task feature learning
Multi-task learning (MTL) aims to improve the performance of multiple related tasks by exploiting the intrinsic relationships among them. Recently, multi-task feature learning alg...
Pinghua Gong, Jieping Ye, Changshui Zhang
ACSAC
2009
IEEE
14 years 3 months ago
An Empirical Approach to Modeling Uncertainty in Intrusion Analysis
: © An Empirical Approach to Modeling Uncertainty in Intrusion Analysis Xinming Ou, Siva Raj Rajagopalan, Sakthiyuvaraja Sakthivelmurugan HP Laboratories HPL-2009-334 intrusion de...
Xinming Ou, Siva Raj Rajagopalan, Sakthiyuvaraja S...
INTERSPEECH
2010
13 years 3 months ago
Prosodic speaker verification using subspace multinomial models with intersession compensation
We propose a novel approach to modeling prosodic features. Inspired by Joint Factor Analysis model (JFA), our model is based on the same idea of introducing subspace of model para...
Marcel Kockmann, Lukas Burget, Ondrej Glembek, Luc...
ICASSP
2008
IEEE
14 years 3 months ago
Accurate models for estimating area and power of FPGA implementations
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabar...