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FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 26 days ago
Automating the Layout of Reconfigurable Subsystems via Template Reduction
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
Shawn Phillips, Akshay Sharma, Scott Hauck
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 1 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ISQED
2002
IEEE
129views Hardware» more  ISQED 2002»
14 years 12 days ago
Design Method and Automation of Comparator Generation for Flash A/D Converter
The design methods and the automation of the comparator circuit layout generation for a flash A/D converter are presented in this paper. The threshold inverter quantization (TIQ)...
Daegyu Lee, Jincheol Yoo, Kyusun Choi
DAC
2002
ACM
14 years 8 months ago
Transformation rules for designing CNOT-based quantum circuits
This paper gives a simple but nontrivial set of local transformation rules for Control-NOT(CNOT)-based combinatorial circuits. It is shown that this rule set is complete, namely, ...
Kazuo Iwama, Yahiko Kambayashi, Shigeru Yamashita
ISQED
2000
IEEE
136views Hardware» more  ISQED 2000»
13 years 12 months ago
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
Mohamed Dessouky, Marie-Minerve Louërat