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» Automatic Clock Abstraction from Sequential Circuits
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ISCAS
2005
IEEE
131views Hardware» more  ISCAS 2005»
14 years 1 months ago
Timing yield estimation using statistical static timing analysis
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
Min Pan, Chris C. N. Chu, Hai Zhou
CAV
2004
Springer
154views Hardware» more  CAV 2004»
13 years 11 months ago
Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qa...
ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
14 years 4 months ago
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
Radu Marculescu, Diana Marculescu, Larry T. Pilegg...
DAC
1999
ACM
14 years 8 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...
IESS
2007
Springer
162views Hardware» more  IESS 2007»
14 years 1 months ago
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs
Abstract This paper presents an embedded system design toolchain for automatic generation of parallel code runnable on symmetric multiprocessor systems from an initial sequential s...
Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, G...