Sciweavers

122 search results - page 9 / 25
» Automatic Data Path Generation from C code for Custom Proces...
Sort
View
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
13 years 12 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
14 years 2 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
PDPTA
2007
13 years 9 months ago
Suppressing Independent Loops in Packing/Unpacking Loop Nest to Reduce Message Size for Message-passing Code
- In this paper we experiment with two optimization techniques we are considering implementing in a parallelizing compiler that generates parallel code for a distributed-memory sys...
P. Jerry Martin, Clayton S. Ferner
VLSID
2002
IEEE
174views VLSI» more  VLSID 2002»
14 years 8 months ago
Architecture Implementation Using the Machine Description Language LISA
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, ...
IPPS
2007
IEEE
14 years 2 months ago
Optimizing Sorting with Machine Learning Algorithms
The growing complexity of modern processors has made the development of highly efficient code increasingly difficult. Manually developing highly efficient code is usually expen...
Xiaoming Li, María Jesús Garzar&aacu...