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ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
14 years 24 days ago
A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems
The goal of the research is twofold First, the derivation of a design methodology for FIR filters implementation based on Residue Number System (RNS), aiming at power, delay and h...
Dimitrios Soudris, K. Sgouropoulos, Konstantinos T...
ENTCS
2006
176views more  ENTCS 2006»
13 years 7 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
ASPDAC
2000
ACM
99views Hardware» more  ASPDAC 2000»
13 years 12 months ago
Reuse and protection of intellectual property in the SpecC system
— In system-level design, the key to cope with the complexities involved with System-on-Chip (SOC) designs, is the reuse of Intellectual Property (IP). With the increasing demand...
Rainer Dömer, Daniel Gajski
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
13 years 11 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
ACSD
2003
IEEE
159views Hardware» more  ACSD 2003»
14 years 25 days ago
Case Studies of Model Checking for Embedded System Designs
As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems ple levels of abstraction, so that the design space can be effectively...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...