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ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
15 years 9 months ago
Temporal floorplanning using 3D-subTCG
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-...
101
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TSP
2008
90views more  TSP 2008»
15 years 3 months ago
Array-Based QR-RLS Multichannel Lattice Filtering
An array-based algorithm for multichannel lattice filtering is proposed. The filter is formed by a set of units that are adapted locally and concurrently using recursions that clos...
J. Gomes, V. A. N. Barroso
CORR
2008
Springer
105views Education» more  CORR 2008»
15 years 4 months ago
Certifying floating-point implementations using Gappa
High confidence in floating-point programs requires proving numerical properties of final and intermediate values. One may need to guarantee that a value stays within some range, ...
Florent de Dinechin, Christoph Quirin Lauter, Guil...
134
Voted
ISCAS
2002
IEEE
153views Hardware» more  ISCAS 2002»
15 years 9 months ago
Biological learning modeled in an adaptive floating-gate system
We have implemented an aspect of learning and memory in the nervous system using analog electronics. Using a simple synaptic circuit we realize networks with Hebbian type adaptati...
Christal Gordon, Paul E. Hasler
96
Voted
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
15 years 8 months ago
Fair watermarking techniques
Many intellectual property protection (IPP) techniques have been proposed. Their primary objectives are providing convincible proof of authorship with least degradation of the qua...
Gang Qu, Jennifer L. Wong, Miodrag Potkonjak