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DATE
2004
IEEE
117views Hardware» more  DATE 2004»
15 years 7 months ago
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks
We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous...
Mohammad Reza Mousavi, Paul Le Guernic, Jean-Pierr...
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
14 years 7 months ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...
ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
15 years 8 months ago
Generating instruction sets and microarchitectures from applications
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
Ing-Jer Huang, Alvin M. Despain
124
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INTEGRATION
2000
71views more  INTEGRATION 2000»
15 years 3 months ago
A hardware implementation of realloc function
The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management. Objectoriented applications oft...
Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chan...
ICCAD
1996
IEEE
80views Hardware» more  ICCAD 1996»
15 years 8 months ago
Generalized constraint generation in the presence of non-deterministic parasitics
In a constraint-drivenlayout synthesisenvironment,parasitic constraints are generated and implemented in each phase of the design process to meet a given set of performance specif...
Edoardo Charbon, Paolo Miliozzi, Enrico Malavasi, ...