Sciweavers

1151 search results - page 66 / 231
» Automatic Generation of Complex Properties for Hardware Desi...
Sort
View
DSD
2008
IEEE
79views Hardware» more  DSD 2008»
15 years 10 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 9 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
CASES
2007
ACM
15 years 8 months ago
Compiler generation from structural architecture descriptions
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...
Florian Brandner, Dietmar Ebner, Andreas Krall
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
16 years 28 days ago
Extending the Applicability of Parallel-Serial Scan Designs
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
15 years 10 months ago
Management of complex automotive communication networks
Automakers are still facing an increasing complexity in vehicle requirements with regard to their EE systems. This complexity is not only caused by innovations, which are being pr...
Thomas Weber