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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
CCGRID
2002
IEEE
14 years 21 days ago
MS-I/O: A Distributed Multi-Storage I/O System
More and more parallel applications are running in a distributed environment to take advantage of easily available and inexpensive commodity resources. For data intensive applicat...
Xiaohui Shen, Alok N. Choudhary
VIS
2007
IEEE
192views Visualization» more  VIS 2007»
14 years 9 months ago
LiveSync: Deformed Viewing Spheres for Knowledge-Based Navigation
Although real-time interactive volume rendering is available even for very large data sets, this visualization method is used quite rarely in the clinical practice. We suspect this...
Peter Kohlmann, Stefan Bruckner, Armin Kanitsar,...
ASPDAC
2007
ACM
124views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
Ajay K. Verma, Paolo Ienne
MICCAI
2010
Springer
13 years 5 months ago
Construction of Patient Specific Atlases from Locally Most Similar Anatomical Pieces
Radiotherapy planning requires accurate delineations of the critical structures. To avoid manual contouring, atlas-based segmentation can be used to get automatic delineations. How...
Liliane Ramus, Olivier Commowick, Grégoire ...