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DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 2 months ago
Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor
A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent function...
Trevor Meyerowitz, Alberto L. Sangiovanni-Vincente...
WCRE
2008
IEEE
14 years 2 months ago
Reverse Engineering CAPTCHAs
CAPTCHAs are automated Turing tests used to determine if the end-user is human and not an automated program. Users are asked to read and answer Visual CAPTCHAs, which often appear...
Abram Hindle, Michael W. Godfrey, Richard C. Holt
AADEBUG
2005
Springer
14 years 1 months ago
An integrated debugging environment for reprogrammble hardware systems
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of parallelism. In our solution to this problem, features are inserted into the u...
Kevin Camera, Hayden Kwok-Hay So, Robert W. Broder...
IUI
2003
ACM
14 years 26 days ago
A zero-input interface for leveraging group experience in web browsing
The experience of a trusted group of colleagues can help users improve the quality and focus of their browsing and searching activities. How could a system provide such help, when...
Taly Sharon, Henry Lieberman, Ted Selker
ITNG
2010
IEEE
14 years 21 days ago
Middleware Specialization for Product-Lines Using Feature-Oriented Reverse Engineering
Supporting the varied software feature requirements of multiple variants of a software product-line while promoting reuse forces product line engineers to use general-purpose, fea...
Akshay Dabholkar, Aniruddha S. Gokhale