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VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 10 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
DAC
2010
ACM
14 years 1 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
DEBU
2008
100views more  DEBU 2008»
13 years 9 months ago
WAVE: Automatic Verification of Data-Driven Web Services
Data-driven Web services, viewed broadly as interactive systems available on the Web for users and programs, provide the backbone for increasingly complex Web applications. While ...
Alin Deutsch, Victor Vianu
SIGSOFT
2010
ACM
13 years 4 months ago
Analyzing hierarchical complex real-time systems
Specification and verification of real-time systems are important research topics which have practical implications. In this work, we present a self-contained toolkit to analyze r...
Yang Liu 0003, Jun Sun 0001, Jin Song Dong