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» Automatic Verification of Pipelined Microprocessors
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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
14 years 10 days ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
DAC
2009
ACM
14 years 9 months ago
Speculation in elastic systems
Speculation is a well-known technique for increasing parallelism of the microprocessor pipelines and hence their performance. While implementing speculation in modern design pract...
Marc Galceran Oms, Jordi Cortadella, Michael Kishi...
DAC
2006
ACM
13 years 10 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
CAV
2004
Springer
140views Hardware» more  CAV 2004»
13 years 11 months ago
Indexed Predicate Discovery for Unbounded System Verification
Predicate abstraction has been proved effective for verifying several infinite-state systems. In predicate abstraction, an abstract system is automatinstructed given a set of predi...
Shuvendu K. Lahiri, Randal E. Bryant
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
14 years 6 days ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin