302 search results - page 19 / 61 » Automatic Verification of Timed Circuits |
DAC
2003
ACM
14 years 12 months ago
2003
ACM
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
ICCAD
2000
IEEE
14 years 3 months ago
2000
IEEE
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
DAC
1990
ACM
14 years 3 months ago
1990
ACM
Symbolic simulation involves evaluating circuit behavior using special symbolic values to encode a range of circuit operating conditions. In one simulation run, a symbolic simulat...
ICFEM
2009
Springer
13 years 8 months ago
2009
Springer
Abstract. This paper shows how Ptolemy II discrete-event (DE) models can be formally analyzed using Real-Time Maude. We formalize in Real-Time Maude the semantics of a subset of hi...
EURODAC
1990
IEEE
14 years 3 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...