302 search results - page 31 / 61 » Automatic Verification of Timed Circuits |
DAC
2005
ACM
14 years 12 months ago
2005
ACM
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
CF
2007
ACM
14 years 2 months ago
2007
ACM
We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we in...
ET
2007
13 years 11 months ago
2007
This article describes an emulation-based method for locating stuck-at faults in combinational and synchronous sequential circuits. The method is based on automatically designing a...
DAC
2004
ACM
14 years 12 months ago
2004
ACM
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
CBMS
1998
IEEE
14 years 3 months ago
1998
IEEE
An OCR system chosen for its high recognition rate and low percent of false positives also assigns low confidence values to many characters that are actually correct. Human operat...