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» Automatic Verification of Timed Circuits
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CAV
2000
Springer
197views Hardware» more  CAV 2000»
14 years 3 months ago
Bounded Model Construction for Monadic Second-Order Logics
Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A. Pnueli Invited Address...
Abdelwaheb Ayari, David A. Basin
AAAI
1997
14 years 7 days ago
Case and Constraint-Based Apartment Construction Project Planning System: FASTrak-APT
To effectively generate a fast and consistent apartment construction project network, Hyundai and KAIST have developed a case and constraint based project planning expert system f...
Kyoung Jun Lee, Hyun Woo Kim, Jae Kyu Lee, Tae Hwa...
BMCBI
2007
107views more  BMCBI 2007»
13 years 11 months ago
OReFiL: an online resource finder for life sciences
Background: Many online resources for the life sciences have been developed and introduced in peer-reviewed papers recently, ranging from databases and web applications to data-an...
Yasunori Yamamoto, Toshihisa Takagi
ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
14 years 3 months ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
POPL
2003
ACM
14 years 11 months ago
From symptom to cause: localizing errors in counterexample traces
There is significant room for improving users' experiences with model checking tools. An error trace produced by a model checker can be lengthy and is indicative of a symptom...
Thomas Ball, Mayur Naik, Sriram K. Rajamani