323 search results - page 27 / 65 » Automatic generation of simulation models for semiconductor ... |
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
WSC
2001
13 years 9 months ago
2001
This paper describes the architecture and potentials of Simone. Simone is a simulation environment to generate, simulate and analyze complex and large scale train networks. The pu...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
The doubling of microprocessor performance every three years has been the result of two factors: more transistors per chip and superlinear scaling of the processor clock with tech...
ANSS
2000
IEEE
13 years 12 months ago
2000
IEEE
The cost of building a new system is usually quite high and without a proper design, a mismatch might occur between the proposed system and the actual system delivered. One aspect...
CDES
2008
13 years 9 months ago
2008
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...