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» Automatic microarchitectural pipelining
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ISLPED
2003
ACM
77views Hardware» more  ISLPED 2003»
14 years 3 months ago
Microprocessor pipeline energy analysis
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation...
Karthik Natarajan, Heather Hanson, Stephen W. Keck...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 3 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
DAC
2003
ACM
14 years 10 months ago
A retargetable micro-architecture simulator
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...
Wai Sum Mong, Jianwen Zhu
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
14 years 4 months ago
Portable compiler optimisation across embedded programs and microarchitectures using machine learning
Building an optimising compiler is a difficult and time consuming task which must be repeated for each generation of a microprocessor. As the underlying microarchitecture changes...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
14 years 1 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith