As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Burch and Dill [3] described an automatic method for verifying a pipelined processor against its instruction setarchitecture(ISA). We describethree techniquesfor improving this me...
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt ...