302 search results - page 58 / 61 » Automatic microarchitectural pipelining |
ASPLOS
2010
ACM
14 years 3 months ago
2010
ACM
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
CASES
2006
ACM
14 years 2 months ago
2006
ACM
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
ISCA
2000
IEEE
14 years 28 days ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
CAV
1998
Springer
14 years 23 days ago
1998
Springer
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...