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FPL
2005
Springer
130views Hardware» more  FPL 2005»
14 years 1 months ago
Communication Synthesis in a multiprocessor environment
At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, Imaging, or MultiMedia) written in a subset of Matl...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
14 years 2 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi
DATE
2002
IEEE
146views Hardware» more  DATE 2002»
14 years 27 days ago
Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The meth...
Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, A...
SIGCOMM
2010
ACM
13 years 8 months ago
Generic and automatic address configuration for data center networks
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...
Kai Chen, Chuanxiong Guo, Haitao Wu, Jing Yuan, Zh...
RSP
2007
IEEE
139views Control Systems» more  RSP 2007»
14 years 2 months ago
Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation
This paper addresses the need for formal specification and runtime verification of system-level requirements of distributed reactive systems. It describes a formalism for specifyi...
Doron Drusinsky, Man-tak Shing