190 search results - page 14 / 38 » Automatically Mapping Code on an Intelligent Memory Architec... |
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
AIIDE
2008
13 years 9 months ago
2008
In this paper we describe a system called ViGLS (Visualization of Game Log Summaries) that generates summaries of gameplay sessions from game logs. ViGLS automatically produces vi...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...