190 search results - page 4 / 38 » Automatically Mapping Code on an Intelligent Memory Architec... |
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
VLSID
2003
IEEE
14 years 7 months ago
2003
IEEE
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
ECAL
2007
Springer
14 years 1 months ago
2007
Springer
Our agent-based model of genotype editing is defined by two distinct genetic components: a coding portion encoding phenotypic solutions, and a non-coding portion used to edit the ...
ASAP
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...