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» BDD-based synthesis of reversible logic for large functions
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GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
13 years 11 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
GPCE
2008
Springer
13 years 8 months ago
Property models: from incidental algorithms to reusable components
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
Jaakko Järvi, Mat Marcus, Sean Parent, John F...
DAC
2006
ACM
14 years 8 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu
GECCO
2005
Springer
196views Optimization» more  GECCO 2005»
14 years 29 days ago
Providing information from the environment for growing electronic circuits through polymorphic gates
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...
Michal Bidlo, Lukás Sekanina
DAC
2006
ACM
14 years 8 months ago
SAT sweeping with local observability don't-cares
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto...