819 search results - page 40 / 164 » BSN Simulator: Optimizing Application Using System Level Sim... |
112
Voted
VLSID
2002
IEEE
16 years 2 months ago
2002
IEEE
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
127
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PATMOS
2005
Springer
15 years 8 months ago
2005
Springer
In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural level, by using extensive clock and ...
146
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CODES
2001
IEEE
15 years 6 months ago
2001
IEEE
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
114
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QEST
2009
IEEE
15 years 9 months ago
2009
IEEE
—Symmetry reduction is a technique for combating state-space explosion in model checking. The generic representatives approach to symmetry reduction uses a language-level transla...
169
Voted
IESS
2009
Springer
15 years 5 days ago
2009
Springer
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...