Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications

In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural level, by using extensive clock and data gating, and by completely redesigning the micro-architecture. We also present original clock gating techniques: pre-computed clock gating. To validate these techniques, extensive comparisons with other realizations of the same microcontroller are presented. It shows that gating techniques can achieve good performances.

• Type: Conference
• Year: 2005
• Where: PATMOS
• Authors: Philippe Manet, David Bol, Renaud Ambroise, Jean-Didier Legat
• Keywords: Clock Gating, Clock Gating Techniques, PATMOS 2005, Pre-computed Clock Gating