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DATE
2005
IEEE
224views Hardware» more  DATE 2005»
14 years 1 months ago
Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL
This paper describes two research projects that develop new low-cost techniques for testing devices with multiple high-speed (2 to 5 Gbps) signals. Each project uses commercially ...
David C. Keezer, C. Gray, A. M. Majid, N. Taher
GECCO
2004
Springer
105views Optimization» more  GECCO 2004»
14 years 1 months ago
Reducing the Cost of the Hybrid Evolutionary Algorithm with Image Local Response in Electronic Imaging
Abstract. The paper focuses on the efficiency of the hybrid evolutionary algorithm (HEA) for solving the global optimization problem arising in electronic imaging. The particular v...
Igor V. Maslov
FPL
2005
Springer
125views Hardware» more  FPL 2005»
14 years 1 months ago
Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...
Marco Lanuzza, Stefania Perri, Martin Margala, Pas...
CHES
2004
Springer
155views Cryptology» more  CHES 2004»
14 years 1 months ago
A Low-Cost ECC Coprocessor for Smartcards
Abstract. In this article we present a low-cost coprocessor for smartcards which supports all necessary mathematical operations for a fast calculation of the Elliptic Curve Digital...
Harald Aigner, Holger Bock, Markus Hütter, Jo...
ISQED
2003
IEEE
215views Hardware» more  ISQED 2003»
14 years 28 days ago
Low-Cost and Real-Time Super-Resolution over a Video Encoder IP
This paper addresses a low-cost and real-time solution for the implementation of super-resolution (SR) algorithms over SOC (System-On-Chip) platforms in order to achieve high-qual...
Gustavo Marrero Callicó, Antonio Nú&...