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» Balancing power consumption in multiprocessor systems
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CODES
2005
IEEE
13 years 9 months ago
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals
We propose a secure platform on a chip multiprocessor, known as FIDES, in order to enable next generation mobile terminals to execute downloaded native applications for Linux. Its...
Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji ...
IEEEPACT
2008
IEEE
14 years 2 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...
ICPPW
2009
IEEE
14 years 2 months ago
Multiprocessor Synchronization and Hierarchical Scheduling
Multi-core architectures have received significant interest as thermal and power consumption problems limit further increase of speed in single-cores. In the multi-core research ...
Farhang Nemati, Moris Behnam, Thomas Nolte
ISCA
2010
IEEE
176views Hardware» more  ISCA 2010»
13 years 12 months ago
Forwardflow: a scalable core for power-constrained CMPs
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
Dan Gibson, David A. Wood
EMSOFT
2005
Springer
14 years 1 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir