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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
14 years 2 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
CGF
2006
136views more  CGF 2006»
13 years 10 months ago
Cache-Efficient Layouts of Bounding Volume Hierarchies
We present a novel algorithm to compute cache-efficient layouts of bounding volume hierarchies (BVHs) of polygonal models. Our approach does not make any assumptions about the cac...
Sung-Eui Yoon, Dinesh Manocha
DSD
2004
IEEE
132views Hardware» more  DSD 2004»
14 years 1 months ago
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy
Filter cache(FC) is effective in achieving energy saving at the expense of some performance degradation. The energy savings, here, comes from repeated execution of tiny loops from...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
13 years 12 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross
IEEEPACT
2002
IEEE
14 years 2 months ago
Leakage Energy Management in Cache Hierarchies
Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan V...