130 search results - page 4 / 26 » Battery-Powered Digital CMOS Design |
ICCD
2000
IEEE
14 years 6 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
ISCAS
1995
IEEE
14 years 1 months ago
1995
IEEE
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
ISCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
— We designed and fabricated a 4-channels digital isolation amplifier in a 0.5µm Silicon-on-Sapphire technology. The isolation device was fabricated on a single die, taking adv...
ISCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
We designed and fabricated an 8-bit analog-to- LiSTOF ENERGY-SCAVENGER PERFORMANCE digital converter (ADC) in a 0.5,um Silicon-on-Sapphire CMOS technology. The ultra-low power and ...
ISLPED
1996
ACM
14 years 1 months ago
1996
ACM
This paper describes a family of high-speed Finite Impulse Response (FIR) digital filters that have been scaled across three generations of CMOS processes. The processes include c...