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MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 3 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
DAC
2003
ACM
14 years 2 months ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
GECCO
2003
Springer
171views Optimization» more  GECCO 2003»
14 years 2 months ago
Genetic Algorithm Optimized Feature Transformation - A Comparison with Different Classifiers
When using a Genetic Algorithm (GA) to optimize the feature space of pattern classification problems, the performance improvement is not only determined by the data set used, but a...
Zhijian Huang, Min Pei, Erik D. Goodman, Yong Huan...
MICRO
1999
IEEE
109views Hardware» more  MICRO 1999»
14 years 2 months ago
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
Daniel A. Connors, Wen-mei W. Hwu
ICFP
1997
ACM
14 years 1 months ago
Implementing Bit-addressing with Specialization
General media-processing programs are easily expressed with bitaddressing and variable-sized bit-fields. But the natural implementation of bit-addressing relies on dynamic shift ...
Scott Draves