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DFT
2004
IEEE
93views VLSI» more  DFT 2004»
14 years 5 days ago
First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Rayc...
ICCV
2005
IEEE
14 years 10 months ago
An Enhanced Correlation-Based Method for Stereo Correspondence with Sub-Pixel Accuracy
The invariance of the similarity measure in photometric distortions as well as its capability in producing subpixel accuracy are two desired and often required features in most st...
Emmanouil Z. Psarakis, Georgios D. Evangelidis
SIGIR
2006
ACM
14 years 2 months ago
A statistical method for system evaluation using incomplete judgments
We consider the problem of large-scale retrieval evaluation, and we propose a statistical method for evaluating retrieval systems using incomplete judgments. Unlike existing techn...
Javed A. Aslam, Virgiliu Pavlu, Emine Yilmaz
ICCAD
1997
IEEE
125views Hardware» more  ICCAD 1997»
14 years 19 days ago
A deductive technique for diagnosis of bridging faults
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
Srikanth Venkataraman, W. Kent Fuchs
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 1 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid