A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
In this paper we propose a model to predict the performance of synchronous discrete event simulation. The model considers parameters including the number of active objects per cyc...
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobb...
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
M. S. Hrishikesh, Doug Burger, Stephen W. Keckler,...
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...