436 search results - page 27 / 88 » Benchmarking and hardware implementation of JPEG-LS |
DDECS
2006
IEEE
14 years 3 months ago
2006
IEEE
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
The first non-enumerative framework for diagnosing path delay faults using zero suppressed binary decision diagrams is introduced. We show that fault free path delay faults with ...
CAV
2001
Springer
14 years 2 months ago
2001
Springer
In this paper we show how the classical job-shop scheduling problem can be modeled as a special class of acyclic timed automata. Finding an optimal schedule corresponds, then, to n...
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
We address the problem of inserting repeaters, selected from a library, at feasible locations in a placed and routed network to meet user-specified delay constraints. We use mini...