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» Benchmarking and hardware implementation of JPEG-LS
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ASAP
2009
IEEE
131views Hardware» more  ASAP 2009»
14 years 25 days ago
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system
This paper presents a new constraint-driven method for computational pattern selection, mapping and application scheduling using reconfigurable processor extensions. The presente...
Kevin Martin, Christophe Wolinski, Krzysztof Kuchc...
IMECS
2007
13 years 9 months ago
A Hybrid Markov Model for Accurate Memory Reference Generation
—Workload characterisation and generation is becoming an increasingly important area as hardware and application complexities continue to advance. In this paper, we introduce a c...
Rahman Hassan, Antony Harris
ICCAD
2008
IEEE
200views Hardware» more  ICCAD 2008»
13 years 1 months ago
Accurate Equivalent Energy Breakeven Time Estimation for Power Gating
Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been pr...
Hao Xu, Wen-Ben Jone, Ranga Vemuri
CODES
2007
IEEE
14 years 2 months ago
Ensuring secure program execution in multiprocessor embedded systems: a case study
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...
Krutartha Patel, Sridevan Parameswaran, Seng Lin S...
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
14 years 1 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...