436 search results - page 58 / 88 » Benchmarking and hardware implementation of JPEG-LS |
205
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FPL
2010
Springer
15 years 3 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
149
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VLSID
2009
IEEE
16 years 6 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
158
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ICAC
2007
IEEE
15 years 12 months ago
2007
IEEE
— The multi-tier implementation has become the industry standard for developing scalable client-server enterprise applications. Since these applications are performance sensitive...
143
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ICRA
2007
IEEE
15 years 12 months ago
2007
IEEE
— The success of sampling-based motion planners has resulted in a plethora of methods for improving planning components, such as sampling and connection strategies, local planner...
165
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CCECE
2006
IEEE
15 years 11 months ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...