436 search results - page 58 / 88 » Benchmarking and hardware implementation of JPEG-LS |
FPL
2010
Springer
13 years 5 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
ICAC
2007
IEEE
14 years 2 months ago
2007
IEEE
— The multi-tier implementation has become the industry standard for developing scalable client-server enterprise applications. Since these applications are performance sensitive...
ICRA
2007
IEEE
14 years 2 months ago
2007
IEEE
— The success of sampling-based motion planners has resulted in a plethora of methods for improving planning components, such as sampling and connection strategies, local planner...
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...