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ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
14 years 1 months ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong
ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 28 days ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...
FCCM
2000
IEEE
162views VLSI» more  FCCM 2000»
14 years 1 days ago
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
Oskar Mencer, Heiko Hübert, Martin Morf, Mich...
ISPD
2000
ACM
113views Hardware» more  ISPD 2000»
14 years 8 hour ago
Floorplan area minimization using Lagrangian relaxation
modules can be handled in constraint graphs efficiently. This Floorplan area minimization is an important problem because many modules have shape flexibilities during the floorplan...
Fung Yu Young, Chris C. N. Chu, W. S. Luk, Y. C. W...
ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
13 years 12 months ago
The Block-Based Trace Cache
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Bryan Black, Bohuslav Rychlik, John Paul Shen