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ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 4 months ago
The Y-Architecture for On-Chip Interconnect: Analysis and Methodology
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Io...
ICML
2002
IEEE
14 years 8 months ago
Hierarchically Optimal Average Reward Reinforcement Learning
Two notions of optimality have been explored in previous work on hierarchical reinforcement learning (HRL): hierarchical optimality, or the optimal policy in the space defined by ...
Mohammad Ghavamzadeh, Sridhar Mahadevan
MOBICOM
2004
ACM
14 years 1 months ago
A study on the feasibility of mobile gateways for vehicular ad-hoc networks
Development in Wireless LAN and Cellular technologies has motivated recent efforts to integrate the two. This creates new application scenarios that were not possible before. Veh...
Vinod Namboodiri, Manish Agarwal, Lixin Gao
ATAL
2006
Springer
13 years 11 months ago
Efficient agent-based cluster ensembles
Numerous domains ranging from distributed data acquisition to knowledge reuse need to solve the cluster ensemble problem of combining multiple clusterings into a single unified cl...
Adrian K. Agogino, Kagan Tumer
ACMSE
2004
ACM
14 years 1 months ago
Execution characteristics of SPEC CPU2000 benchmarks: Intel C++ vs. Microsoft VC++
Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedi...
Swathi Tanjore Gurumani, Aleksandar Milenkovic