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DFT
2005
IEEE
83views VLSI» more  DFT 2005»
14 years 1 months ago
An ILP Formulation for Yield-driven Architectural Synthesis
Data flow graph dominant designs, such as communication video and audio applications, are common in today’s IC industry. In these designs, the datapath resources (e.g., adders,...
Zhaojun Wo, Israel Koren, Maciej J. Ciesielski
ISQED
2003
IEEE
123views Hardware» more  ISQED 2003»
14 years 25 days ago
Advanced Module Packaging Method
An intermediate solution between conventional printed circuit board technology and wafer level packaging, WLP, is to fabricate interconnection circuits and flip chip assembly stru...
Peter C. Salmon
DATE
2010
IEEE
148views Hardware» more  DATE 2010»
14 years 19 days ago
Intent-leveraged optimization of analog circuits via homotopy
—This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that ...
Metha Jeeradit, Jaeha Kim, Mark Horowitz
DATE
2009
IEEE
123views Hardware» more  DATE 2009»
13 years 11 months ago
Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
ARVLSI
2001
IEEE
305views VLSI» more  ARVLSI 2001»
13 years 11 months ago
Logic Design Considerations for 0.5-Volt CMOS
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
K. Joseph Hass, Jack Venbrux, Prakash Bhatia